Method of forming a salicided self-aligned metal oxide semiconductor device using a disposable silicon nitride spacer

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United States of America Patent

PATENT NO 4912061
SERIAL NO

07176837

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Abstract

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A method of fabricating a SALICIDED self aligned metal oxide semiconductor device using a disposable silicon nitride spacer, metal silicide and a single implant step for the source, drain and gate regions is disclosed. The fabrication of the device is accomplished in seven major steps: First, on a substrate having an oxide layer, an undoped polysilicon layer defining the gate region is deposited. Second, an oxide layer is grown and then a silicon nitride layer is deposited. Third, the oxide and the silicon nitride layers are selectively etched, leaving the oxide and the nitride layers on the walls of the polysilicon gate region. Fourth, a cobalt layer is deposited on the wafer and processed to form cobalt silicide, after which the cobalt that did not come in contact with the silicon or the polysilicon gate region is removed. Fifth, the nitride layer on the walls of the gate region is removed. Sixth, a single ion implant step is used to form the N-channel Transistors of the device. Seventh, a single ion implant step is used to form the P-channel transistor of the device.

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Patent Owner(s)

  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nasr, Andre I Marlboro, MA 9 475

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