Programmable summing functions for programmable logic devices

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United States of America Patent

PATENT NO 4912345
SERIAL NO

07291711

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Abstract

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A programmable logic device includes a programmable logic array and an output logic macrocell. The output logic macrocell includes a user configurable summing function that has a first logic gate connected to receive a first plurality of product terms, a second logic gate connected to receive a second plurality of product terms and a third logic gate connected to receive the combination of the first plurality of product terms and a controls signal, a fourth logic gate connected to receive the combination of the second plurality of Product Terms and the control signal and a logic circuit connected to receive the output signals from the first, second, third and fourth logic gates and to provide a first logical combination when the control signal is at a first logic state and a second logical combination when the controls signal is at a second logic state.

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Patent Owner(s)

Patent OwnerAddress
SGS-THOMSON MICROELECTRONICS INC1310 ELECTRONICS DRIVE CARROLLTON TEXAS 75006

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Raad, Safoin A Scottsdale, AZ 2 157
Steele, Randy C Scottsdale, AZ 25 988

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