Dynamic random access memory device with staggered refresh
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United States of America Patent
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Mar 27, 1990
Grant Date -
N/A
app pub date -
Sep 22, 1988
filing date -
Sep 26, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A dynamic random access memory (DRAM) comprises a divided plurality of memory array blocks. Each memory array block comprises a memory array having memory cells and a sense amplifier. In refresh operation, activating signals for activating each of the sense amplifiers are outputted. The output timings of the activating signals are different from each other, so that each of the sense amplifiers are activated at different timings. Consequently, a peak value of the current consumed by the activation of the sense amplifiers can be reduced.
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