Dynamic memory management system and method

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United States of America Patent

PATENT NO 4914577
SERIAL NO

07074310

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Abstract

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A system and method for allowing dynamic configuration of the translation entries within a memory management system of a computer. In the disclosed embodiment, portions of a logical address from a CPU are defined as offset, page, volume/page, and volume fields. The offset field is presented unaltered to a main memory to select a specific location within a page of memory. The page field forms a first portion of the address of a selected entry in the translation memory. The volume/page field is combined with the contents of a base register as specified by the contents of a mask register to form the remaining portion of the address of a selected entry in the translation memory. The volume field and volume/page fields are compared to one or more tags stored in the translation memory to determine if a match exists. If a match exists, the frame pointer associated with the matching tag is output to main memory as the physical address of the frame containing the desired page.

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Patent Owner(s)

Patent OwnerAddress
ICON INTERNATIONAL INCTWO STAMFORD PLAZA 8TH FLOOR 281 TRESSER BOULEVARD STAMFORD CT 06901

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Muhlestein, Mark Orem, UT 39 1650
Rorden, Randall J Orem, UT 3 133
Stewart, Darryl J Provo, UT 2 114

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