Communication system having interrupts with dynamically adjusted priority levels

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United States of America Patent

PATENT NO 4914580
SERIAL NO

07112581

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Abstract

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A communication system includes a processor, memory circuits and a plurality of interfaces for interfacing to data devices. The processor services the interfaces using an interrupt bus including unidirectional inbound and outbound buses. The inbound bus includes one lead for each interface, with each lead having a fixed priority level assigned by the processor. Each interface has access to all leads of the inbound bus. The processor sends commands over the outbound bus to dynamically control the connection of an interface to a lead of the inbound bus.

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Patent Owner(s)

Patent OwnerAddress
AVAYA TECHNOLOGY CORP211 MOUNT AIRY ROAD BASKING RIDGE NEW JERSEY 07920 UNITED STATES OF AMERICA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jensen, Craig W Aberdeen, NJ 3 81
Keller, Frederick R Jackson, NJ 3 81

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