Integrated circuit employing dummy conductors for planarity

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United States of America Patent

PATENT NO 4916514
SERIAL NO

07200410

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An integrated circuit having improved planarity includes a substrate, a plurality of transistors integrated into a top surface of the substrate, and a plurality of insulating layers over the top surface which are interleaved with respective sets of signal conductors. These signal conductors are spaced apart on the insulating layers and are routed through holes in the insulating layers to the transistors in order to carry signals to and from the transistors. Also, in accordance with the invention, the integrated circuit further includes dummy conductors on the insulating layers in the spaces between the signal conductors. These dummy conductors are open circuited and consequently carry no signals. Their function is purely mechanical; and specifically, they function to partially fill the spaces between the signal conductors such that an overlying insulating layer can be formed without peaks and valleys. For ease of fabrication, these dummy conductors are formed with the same mask and by the same steps as the signal conductors; and thus they are of the same material and have the same thickness as the signal conductors.

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Patent Owner(s)

Patent OwnerAddress
UNISYS CORPORATION DETROIT MICHIGAN A CORPORATION OF DENot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nowak, Matthew M San Diego, CA 24 827

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