Phase-locked loop delay line
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United States of America Patent
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-
May 1, 1990
Issued Date -
N/A
app pub date -
Jun 3, 1988
filing date -
Oct 7, 1986
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A circuit for providing precise delays includes a phase-locked loop driven by a reference frequency source such as a crystal oscillator and including a variable delay circuit. The output of the oscillator is applied to the delay circuit and the non-delayed and delayed signals are compared in a phase comparator. An error signal representative of phase error is developed and applied to vary the amount of delay until the phase error is eliminated. A precise delay referenced to the oscillator frequency is therefore achieved.
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