Data processing system for converting virtual to real addresses without requiring instruction from the central processing unit
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United States of America Patent
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May 1, 1990
Grant Date -
N/A
app pub date -
Dec 11, 1985
filing date -
Mar 2, 1984
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A computer system includes a central processing unit, a main memory unit and a master controller unit, which master controller interconnects the processing unit and the memory. The processing unit utilizes virtual addresses and generates virtual address to access the memory. However, the memory is accessed using real addresses. Thus, the master controller performs the required translating function for the interoperability of the processor and memory and does so without requiring instructions from the processor. This represents a significant decrease in processor overhead.
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