Method for controlling propogation of data and transform through memory-linked wavefront array processor
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United States of America Patent
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May 1, 1990
Issued Date -
N/A
app pub date -
Jan 15, 1988
filing date -
Sep 17, 1985
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method for performing computations with an asynchronous linear array of multiple processing stages is disclsoed. The linear array comprises multiple processing stages interspersed with flow control flag mechanisms and with dual port linking memories. The method utilizes the flow control flag mechanisms between processing stages to control the flow of computations through the array.
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