Memory re-mapping in a microcomputer system
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United States of America Patent
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-
May 1, 1990
Issued Date -
N/A
app pub date -
Aug 7, 1989
filing date -
Mar 23, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A microcomputer system has a first, low order address, memory soldered to the planar printed circuit board and can accept further memory pluggable into a socket on the board. At power on self test, the memories are tested, and, if an error is detected in the first memory, this memory is disabled by directing the lowest order memory addresses to the second memory and reducing the highest order addresses by the number of locations in the first memory.
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