Method of reducing wearout in a non-volatile memory with double buffer

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United States of America Patent

PATENT NO 4922456
SERIAL NO

07187979

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Abstract

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A method of preventing a power failure from corrupting data being written to a non-volatile memory. Before a write operation is performed, information is written to a double buffer to reconstruct the steps that will be performed during the write operation. A flag is set indicating that the information in the double buffer is accurate. The write operation is then performed and the flag is cleared. The double buffer is dynamically moved throughout the non-volatile memory to distribute the wearout of the non-volatile memory as evenly as possible.

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Patent Owner(s)

Patent OwnerAddress
CISCO TECHNOLOGY INC170 WEST TASMAN DRIVE SAN JOSE CA 95134-1706

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Naddor, David J Doraville, GA 10 1379
Schaubs, Randolph J Stone Mountain, GA 8 1242

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