Personalizable CMOS gate array device and technique
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United States of America Patent
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May 8, 1990
Issued Date -
N/A
app pub date -
Dec 18, 1989
filing date -
Jan 20, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An integrated circuit device comprising a collection of semiconductor elements and fusible links interconnecting the collection of semiconductor elements, whereby selective fusing of the fusible links defines the electronic function provided by the collection of semiconductor elements. Such semiconductor elements are typically transistors.
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