Digital phase lock loop
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United States of America Patent
Stats
-
May 29, 1990
Grant Date -
N/A
app pub date -
Dec 6, 1988
filing date -
Dec 6, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An apparatus and/or method for generating a digital clock signal which is frequency and phase referenced to an external digital data signal is disclosed. The external digital data signal is typically subject to variations in data frequency and high frequency jitter unrelated to changes in the data frequency.
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