Low capacitance integrated circuit package

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United States of America Patent

PATENT NO 4931854
SERIAL NO

07307830

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An integrated circuit package utilizing low temperature sealing glass and having reduced lead capacitance. Voids in the glass material on the base substrate and the cap substrate result in the formation of glass-free cavities when the base substrate is fused to the cap substrate. A lead frame extending from and passing through the glass material which couples the base substrate to the cap substrate also passes through the glass-free cavities, resulting in a reduced parasitic capacitance of the package leads.

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Patent Owner(s)

  • KYOCERA AMERICA, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kawamura, Ikunosuke Vancouver, WA 2 14
Shirai, Kiyohide San Diego, CA 2 14
Yonemasu, Hiro San Diego, CA 2 14

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