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Abstract

A bit map image processing apparatus includes a window detector for detecting a window position on a screen and a frame memory for storing image data. The frame memory has p 2-port memories each having an l bits.times.m (column).times.n (row) memory area. Each row of the two-dimensional memory area of the frame memory is divided and managed in units of l.multidot.p bits. The apparatus further has a first multiplexer for selecting as a read memory address one of a background memory address and a window memory address in accordance with a detection result of the window detector, a second multiplexer for selecting as a memory address one of read address output from the first multiplexer and a write address input thereto in accordance with the detection result of the window detector, an address converter for converting the memory address output from the second multiplexer into individual memory addresses for each 2-port memory, and a shift register section for converting into serial data the image data output in units of l bits from the p 2-port memories in accordance with the individual memory addresses.

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First Claim