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Abstract

A circuit for carrying out a full search block matching algorithm with fractional pixel precision comprises a first subcircuit for obtaining displacement vectors with integer pixel value precision and a second subcircuit for correcting the displacement vectors obtained by the subcircuit so that the displacement vectors have fractional pixel value precision. To obtain a displacement vector with integer value precision for a block of pixels of a current video frame in a search area of a previous video frame, the first subcircuit finds a first specific position of the block with the smallest error out of a first plurality of positions defined by integer pixel values in the search area. The second subcircuit interpolates the integer pixel values of the first specific position to obtain fractional pixel values which define a second plurality of positions in the search area. The second subcircuit then determines which position of the block in the second plurality of positions has the smallest error, thereby providing a correction with fractional pixel precision for the displacement vector.

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