PLL frequency stabilization in data packet receivers
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United States of America Patent
Stats
-
Jul 3, 1990
Grant Date -
N/A
app pub date -
Mar 28, 1988
filing date -
Mar 28, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A frequency stabilization circuit for a PSK data packet receiver includes a reference oscillator for supplying a continuous reference signal to a limiter that supplies feeds received data packets to a phase locked loop detection circuit including a voltage controlled oscillator. The frequency of the continuous reference signal is close to the carrier frequency of the data packets and maintains the frequency of the voltage controlled oscillator close to the data packet carrier frequency between data packets. During data packets, the reference oscillator signal is 'swamped out' by the limiter.
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