Error connection device for parity protected memory systems
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United States of America Patent
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Jul 17, 1990
Grant Date -
N/A
app pub date -
Jun 17, 1988
filing date -
Jun 17, 1988
priority date (Note) -
Expired
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Abstract
The use of a redundant memory subsystem, memory flow control, and a method of copying (srubbing) data from the location of one memory subsystem to the corresponding location in the other memory subsystem provides correction of soft errors in a parity protected memory system without degrading the performance of the memory system except when an error occurs. A copy of the correct data is also provided to the memory system when a location in either of the memory subsystems experiences a hard error.
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