Programmable clock frequency divider
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United States of America Patent
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-
Aug 7, 1990
Grant Date -
N/A
app pub date -
Nov 20, 1987
filing date -
Nov 20, 1986
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A clock frequency divider for generating a basic clock signal which provides operation timing for a semiconductor integrated circuit operating in accordance with a program. The clock frequency divider comprises a frequency-dividing factor register for storing a frequency-dividing factor which can be rewritten by the program, and a frequency-dividing circuit for frequency-dividing a source clock signal having a fixed frequency in accordance with the frequency-dividing factor stored in the frequency-dividing factor register, whereby a basic clock which provides a processing rate optimum for a program to be executed being obtained.
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