Code error detecting method

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United States of America Patent

PATENT NO 4949342
SERIAL NO

07180063

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Abstract

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The code error detecting method uses the code error detecting apparatus which comprises a sector buffer memory for storing various kinds of data, an adder circuit for performing exclusive OR addition of data, a CRC generator/checker for producing error check parities by dividing a result of addition performed in the adder circuit by a predetermined generator polynomial, a temporary memory for storing the error check parities, and an error correction circuit for calculating error correction parities which are used to correct an error of the data. At the time of recording, the data incorporating various parities produced in the code error detecting apparatus is recorded on an optical disk, and, at the time of reproducing, the data reproduced and stored in the sector buffer memory is corrected by using the reproduced error correction parities, and the error check parities are obtained by using the CRC generator/checker. Then, the error check parities thus obtained are compared with the reproduced error check parities stored in the sector buffer memory to thereby detect a code error of the data.

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Patent Owner(s)

Patent OwnerAddress
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD 1006 OAZA KADOMA KADOMA-SHI OSAKA JAPAN A CORP OF JAPANNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kurosawa, Katsuhiro Sagamihara, JP 1 74
Shimbo, Masatoshi Minoo, JP 22 415

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