Method and apparatus for manufacturing a test-compatible, largely defect-tolerant configuration of redundantly implemented, systolic VLSI systems
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 21, 1990
Grant Date -
N/A
app pub date -
Aug 26, 1988
filing date -
Sep 22, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method and apparatus for the production of a test-compatible, largely defect-tolerant configuration of redundantly implemented, systolic VLSI systems. The method and apparatus for the configuration of redundantly implemented, systolic VLSI systems meets the conditions of defect-tolerance, test-compatibility and minimum hardware requirement. For this purpose, every module of the multi-dimensional systolic VLSI system has control logic allocated to it which controls A, B and C switches for the appertaining module. It is possible with the use of these switches to bridge a maximum of up to two faulty modules per row and one faulty module per column. A configuration algorithm provides a determination as to whether the established VLSI system is in the position to be able to execute the desired arithmetic operations.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully