Pattern defects detection method and apparatus

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United States of America Patent

PATENT NO 4953224
SERIAL NO

07158125

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Abstract

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A pattern defect detecting method and apparatus are disclosed on a connectivity processor to input a binary picture signal pattern and a pad position coordinate and outputting connectivity data between pads. Here, the connectivity processing refers to a processing for giving the identical number to one aggregation of connected or linked pads for the pads given to a serial pattern. In the connectivity processor wherein a plane on which the drawn pattern to be inspected is scanned by a linear sensor, the connectivity processing can be releazed almost concurrently with the scanning by driving a temporary memory. Also, a pattern defect detecting apparatus the above-mentioned connectivity. The invention processing coping with the difficulties of a required inspection level, and also represents a processing time of each embodiment theoretically. A moving time of the bed on which an inspecting object is placed and others are added to the real processing time.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD 6 KANDA SURUGADAI 4-CHOME CHIYODA-KU TOKYO JAPAN A CORP OF JAPANNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ichinose, Toshiaki Yokohama, JP 5 228
Nakagawa, Yasuo Chigasaki, JP 44 1275
Ninomiya, Takanori Yokohama, JP 72 1745

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