Interconnect structure for integrated circuits
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United States of America Patent
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-
Sep 11, 1990
Grant Date -
N/A
app pub date -
Nov 20, 1987
filing date -
Nov 20, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor integrated device support structure having a transmission line interconnect structure in a metal block on which the devices are mounted. The metal block is formed photolithographically from layers which define X,Y sections of the block. A plurality of stacked layers contains the complete wireline interconnect network. Each wire is a true coaxial transmission line having an inner conductor, a surrounding dielectric material and an outer conductor. By appropriate choice of radii of the inner conductor and the surrounding dielectric material, favorable impedances may be selected.
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