Low power three-stage CMOS input buffer with controlled switching
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United States of America Patent
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Sep 18, 1990
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N/A
app pub date -
Jun 19, 1989
filing date -
Jun 19, 1989
priority date (Note) -
Expired
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Abstract
A CMOS low power Schmitt type input buffer for a dynamic random access memory (DRAM) circuit. This buffer is further characterized in that a falling edge on the input has better than average noise immunity and has a slightly longer propagation time through the buffer than a rising edge.
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