System for assigning interrupts to least busy processor that already loaded same class of interrupt routines
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United States of America Patent
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Sep 25, 1990
Grant Date -
N/A
app pub date -
May 16, 1988
filing date -
May 16, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An apparatus and method for processing of interrupts in a computer system includes interrupts which are presented substantially simultaneously to each of a plurality of processors in the computer system. Each of the plurality of processors may respond to the interrupts and the first processor assigned to handle the interrupt prevents the other processors from handling the interrupts. The present invention further discloses means for disabling processors from responding to interrupts.
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