Contact plug and interconnect employing a barrier lining and a backfilled conductor material

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United States of America Patent

PATENT NO 4960732
SERIAL NO

07436399

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A stable, low resistance contact is formed in a contact hole (16) through an insulating layer (14), e.g., silicon dioxide, formed on a surface of a semiconductor substrate (12), e.g., silicon, to a portion of a doped region (10) in said semiconductor surface. The contact comprises (a) an adhesion and contacting layer (18) of titanium formed along the walls of the insulating layer and in contact with the portion of the doped region; (b) a barrier layer (20) formed over the adhesion and contacting layer; and (c) a conductive material (22) formed over the barrier layer and at least substantially filling said contact hole. A patterned metal layer (26) forms an ohmic contact interconnect to other devices and external circuitry. The adhesion and contacting layer and barrier layer are either physically or chemically vapor deposited onto the oxide surface. The conductive layer comprises one of CVD or bias sputtered tungsten, molybdenum or in situ doped CVD polysilicon. The contact of the invention avoids the problems of encroachment at the oxide-silicon interface and worm holes associated with other contact schemes but retains process simplicity.

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Patent Owner(s)

  • ADVANCED MICRO DEVICES, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dixit, Pankaj Sunnyvale, CA 17 1091
Farnaam, Mohammad Santa Clara, CA 5 652
Klein, Richard K Mountain View, CA 22 577
Sander, Craig S Mountain View, CA 16 595
Sliwa, Jack Los Altos Hills, CA 7 861

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