Extended errors correcting device having single package error correcting and double package error detecting codes
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United States of America Patent
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Oct 2, 1990
Grant Date -
N/A
app pub date -
Nov 28, 1988
filing date -
Apr 29, 1988
priority date (Note) -
Expired
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Abstract
An apparatus and method for correcting data words from a memory is provided in which coded data is divided into a plurality of multi-bit packages of b bits each. The coded data comprises n-bit words with r error correcting code bits and n-r data bits. The invention is capable of correcting one package which has suffered at least one hard failure and a single soft error located in a different package. The invention involves the use of an error correcting code which gives a first syndrome when the data word has suffered a first error coming from at least one error in a first package and a single error in a different second package, which also gives a second syndrome when the data word has suffered a second error coming from at least one error in the above first package, and a single error in a third package. The error correcting code is such that equality of the first and second syndromes results in the equality of the first and second errors.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- INTERNATIONAL BUSINESS MACHINES CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Debord, Pierre | Tourrettes sur Loup, FR | 8 | 205 |
Glaise, Rene | Nice, FR | 37 | 647 |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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