Digital/analog converter with high output voltage stability
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United States of America Patent
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Oct 16, 1990
Grant Date -
N/A
app pub date -
Nov 17, 1988
filing date -
Nov 17, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A digital/analog converter designed for very high frequencies is described. It has a first stage, which is a standard stage, in which several parallel-mounted controllable loads deliver currents in geometrical progression in a current/voltage converting transistor. Each controllable load has an input transistor, to the gate of which a bit is addressed as well as a diode and a saturable resistor. The second stage is a shifter formed by a transistor mounted as a follower source, in series with at least one diode and one pull-back transistor, the source of which is at a negative potential. The voltage at the drain of the converting transistor is applied to the gate of the shifter transistor, and the output voltage at the drain of the pull-back transistor is looped to the gate of the converting transistor.
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