Process for fabricating small size electrodes in an integrated circuit

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United States of America Patent

PATENT NO 4968646
SERIAL NO

07448956

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Abstract

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According to the invention, a first layer of conductive material (11) is submitted to an incomplete etching operation in the presence of a mask (13). After elimination of the mask, a second layer of conductive material is deposited, and the thus-obtained result is submitted to an etching operation without a mask, so allowing the inter-electrode gaps to be reduced. The process provides a very tight electrode configuration, and is particularly suited to charge-coupled devices.

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Patent Owner(s)

Patent OwnerAddress
THOMSON COMPOSANTS MILITAIRES ET SPATIAUX75008 PARIS

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baussand, Patrick Gieres, FR 2 15
Blanchard, Pierre Echirolles, FR 70 412

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