Importance

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Abstract

A circuit for interfacing (parallel format) TTL signals with a serial format ECL signal port includes a parallel-to-serial shift register, a first voltage level shifting stage and an output, TTL-ECL level shifting stage, connected in cascade. Each of the shift register and the first level shifting stage is powered exclusively by an on-board TTL power supply. The output level shifting stage is powered by the on-board TTL supply and from an external connection to a downstream module. The serial output of the shift register is a `positive ECL` signal having a voltage swing corresponding to that of conventional negative polarity ECL signals. From this signal the first level shifting stage produces an intermediate level (quasi analog) signal which transitions between reduced or intermediate high and low voltage levels about a switching leel corresponding to that (e.g. +1.5 volts) of normal TTL signals but having the ELC-type voltage swing. This intermediate level TTL type signal is coupled to the output TTL-ECL voltage level shifting stage to which the signal ECL output port to be coupled to the downstream CRT unit is connected. Since the output stage is readily accessible for connection to an external power supply, specifically a -5 volt ECL supply rail of an adjacent, module, it is powered by both the internal TTL supply bus and by an external jumper connection to the module to which the output ECL signals are to be supplied.

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First Claim