Content addressable memory with flag storage to indicate memory state

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United States of America Patent

PATENT NO 4975873
SERIAL NO

07283293

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Abstract

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A content addressable memory device capable of correct retrieval operation comprises a flag bit column (12) provided in a memory cell array. The flag bit column (12) stores a flag signal indicating whether a word is in a data written state or an empty state for each word in a data array (2). In the retrieval operation, the data written in the data array (2) and a flag bit column (12) are simultaneously retrieved, providing a correct retrieval result. In addition, since the flag bit column (12) is provided in the memory cell array, it can be controlled in a manner similar to controlling the data array (2).

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Patent Owner(s)

  • MITSUBISHI DENKI KABUSHIKI KAISHA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kondou, Harufusa Hyogo, JP 7 330
Nakabayashi, Takeo Hyogo, JP 27 437

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