Static semiconductor memory with improved write recovery and column address circuitry
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United States of America Patent
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Dec 4, 1990
Grant Date -
N/A
app pub date -
Oct 20, 1988
filing date -
Oct 20, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A static random access memory (SRAM) having a reduced access time for reading and reduced probability of inadvertent writing operations. Switching circuits (multiplexers) that are used to connect column bit lines with reading and writing circuits of the memory are divided into separate circuits for use during read and write operations. A recovery pulse is applied only to bit lines of a column just written to by use of the driving circuits through the same column line switching circuits.
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