Selective solder formation on printed circuit boards
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United States of America Patent
Stats
-
Dec 18, 1990
Grant Date -
N/A
app pub date -
Sep 26, 1988
filing date -
Sep 26, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Disclosed is a method of providing solder on selected portions of a printed circuit board. Solder is first electroplated over copper conductor patterns on the board by means of a first photoresist layer. After stripping the first photoresist, a second photoresist layer is laminated over the board and developed to expose selected portions of the solder. The exposed portions are selectively stripped. The copper exposed by the selective stripping is then subjected to a scrubbing while the photoresist protects the remaining solder, and the second photoresist is removed.
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