Semiconductor device package assembly hairing non-symmetrical semiconductor chip mounting within conductible lead pattern
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United States of America Patent
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-
Jan 1, 1991
Grant Date -
N/A
app pub date -
Mar 2, 1988
filing date -
Mar 18, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor device package assembly including a semiconductor chip (10) which contains an electronic circuit and is mounted on a support plate (12) of electrically conductive material. Disposed substantially in the plane of the support plate (12) are conductor strips (18) which extend in the direction towards the support plate (12) and at their ends remote from the support plate (12) are formed as terminal conductors (22) for establishing connections to external electronic circuits. Selected conductor strips (18) are connected to selected points of the electronic circuit in the chip (10). A housing is provided which encloses the support plate (12), the semiconductor chip (10) and the conductor strips (18) and out of which the terminal conductors (22) project. At least one of said terminal conductors (22) serves for the application of ground. The support plate (12) on which the semiconductor chip is mounted is arranged in non-symmetrical is offset relation with respect to the conductive lead pattern as defined by the conductor strips, being offset in the direction toward the at least one terminal conductor (22) serving for the application of ground and/or integrally connected to ground.
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