Flexible, next-address generation microprogram sequencer

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United States of America Patent

PATENT NO 4984151
SERIAL NO

07227452

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Abstract

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A flexible, sequencer for providing next-address generation in the execution of a microprogram is described. The sequencer includes means for receiving an externally provided base address and an externally provided address offset value, a stack for storing return base address pointers, and means for storing a current program pointer counter address. The sequencer comprises means for selecting an address from one of a plurality of generated addresses and for providing the selected address as the next address in the execution of the microprogram, and means for generating the plurality of addresses including an address generation means selected from the group consisting of means for adding the address offset value with a stack stored return base address, means for adding the address offset value with the current program pointer counter address, means for selectively incrementing the selected address by one of a plurality of predetermined integral values, and means for selectively shifting the address offset value and for overlaying the external base address with the shifted address offset value, each means respectively generating one of the plurality of the generated addresses.

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Patent Owner(s)

Patent OwnerAddress
LATTICE SEMICONDUCTOR CORPORATION5555 NE MOORE CT HILLSBORO OR 97124

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dujari, Vineet San Jose, CA 14 344

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