Instruction prefetching device with prediction of a branch destination address
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United States of America Patent
Stats
-
Jan 8, 1991
Issued Date -
N/A
app pub date -
Dec 19, 1988
filing date -
Nov 17, 1982
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An instruction prefetching device of a data processing system prefetches an instruction sequence, usually before decoding of a branch instruction being prefetched, by predicting a branch destination address which is preliminarily stored in a branch history table (46) and retrieved by an instruction address of the branch instruction. Preferably, a prediction evaluating circuit (66) evaluates the predicted destination address with attention directed to a result which is obtained by actually executing the branch instruction and indicates whether the branch instruction indicates 'no go' or 'go' to the branch. When the prediction is incorrect, the prefetch is suspended. Furthermore, the branch destination address is renewed to a new address obtained by decoding of the branch instruction. More preferably, a discriminator (73) discriminates whether or not the instruction being prefetched is really a branch instruction. If not, the predicted destination address is neglected.
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