High speed sensor system using a level shift circuit
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United States of America Patent
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-
Jan 8, 1991
Grant Date -
N/A
app pub date -
Jan 30, 1989
filing date -
Jan 28, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor memory device has a sense amplifier which is constructed with a level shift circuit having an input which senses the change in a data line from an initial precharged level to a level near the vicinity of the supply voltage level which corresponds to data reading amounts from a memory cell during the reading mode of operation of the memory. The level shift circuit, in response to a memory cell reading signals, provides a level shifted output to the input terminal of a differential sense amplifier circuit, the level shifted output being in the vicinity of the operating point of the differential sense amplifier circuit. The level shift circuit includes a current amplifier having an output terminal that is formed with a series connecting node of a current amplifying transistor and a current source.
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