Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system
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United States of America Patent
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-
Jan 15, 1991
Grant Date -
N/A
app pub date -
Sep 27, 1988
filing date -
Sep 27, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A bus switching apparatus and method for multiple processor computer systems comprises a plurality of bus switches interconnected by branch buses. Each processor or other module of the system is connected to a spigot of a bus switch. Each bus switch also serves as part of a backplane of a modular crate hardware package. A processor initiates communication with another processor by identifying that other processor. The bus switch to which the initiating processor is connected identifies and secures, if possible, a path to that other processor, either directly or via one or more other bus switches which operate similarly. If a particular desired path through a given bus switch is not available to be used, an alternate path is considered, identified and secured.
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