Method and apparatus for testing integrated circuits

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United States of America Patent

PATENT NO 4987365
SERIAL NO

07344885

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Abstract

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A method and apparatus for testing an integrated circuit of the type which is mounted on a flexible strip and which includes a die in electrical communication with a plurality of test pads formed on the strip. In the method, a selected strip segment having an integrated circuit die mounted thereon is positioned against a substantially flat strip support member. A portion of the strip is compressed against the strip support member and thereafter a test probe is urged against each of selected test pads. The integrated circuit is tested and thereafter the probes are lifted from the pads, pressure is removed from the strip and the next integrated circuit is similarly tested.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE LTDSINGAPORE SINGAPORE SINGAPORE CITY SINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Atwood, B Dale Corvallis, OR 1 23
Shreeve, Robert W Corvallis, OR 24 343

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