Semiconductor memory device having a plurality of access ports
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United States of America Patent
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Jan 22, 1991
Grant Date -
N/A
app pub date -
Mar 6, 1989
filing date -
Mar 4, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An improved semiconductor memory device in which serial read operations and serial write operations can be performed simultaneously is disclosed. The memory device comprises a memory array of memory cells, a random access port for accessing a desired one of memory cell in the array, a serial read circuit for sequentially reading data from the selected row one by one and a serial write circuit for operatively writing data sequentially applied to the selected row.
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