Optimal test generation for finite state machine models

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United States of America Patent

PATENT NO 4991176
SERIAL NO

07362724

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Abstract

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Faster, yet, completely efficient and exhaustive testing is afforded an entity (e.g., protocol, VLSI circuit, software application) represented as finite state machines by employing the present method in which test sequences are generated according to minimum cost function rules. Minimum cost unique signatures are developed for state identification of the finite state machine. Based upon the minimum cost unique signatures, a minimum cost test sequence is generated to cover every state transition of the finite state machine. As a result, every testable aspect of the entity is guaranteed to be tested using a minimum number of steps which represents a considerable cost savings.

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Patent Owner(s)

Patent OwnerAddress
AMERICAN TELEPHONE AND TELEGRAPH COMPANY550 MADISON AVENUE NEW YORK NEW YORK 10022 UNITED STATES OF AMERICA
BELL TELEPHONE LABORATORIES INCORPORATED600 MOUNTAIN AVENUE A CORP OF NY MURRAY HILL NJ 07974-2070

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dahbura, Anton T Chester, NJ 5 143
Sabnani, Krishan K Berkeley Heights, NJ 35 2006
Uyar, M Umit Sea Bright, NJ 4 138

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