Output circuit having high speed operation and low power dissipation
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United States of America Patent
Stats
-
Feb 26, 1991
Grant Date -
N/A
app pub date -
Jul 17, 1989
filing date -
Jul 19, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
There is provided an improved output circuit having high speed operation and low power dissipation. The circuit having MOS pull up and pull down transistors, wherein a control signal to the pull down MOS is delayed to discharge parasitic capacitance and to prevent both MOS transistors from being on simultaneously.
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