US Patent No: 5,001,662

Number of patents in Portfolio can not be more than 2000

Method and apparatus for multi-gauge computation

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ATTORNEY / AGENT: (SPONSORED)
 

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Abstract

Methods and apparatus are provided for performing multi-gauge arithmetic operations in a microprocessor CPU. Special purpose instructions facilitate parallel processing of individual bytes or half words of data words without requiring that the processor's mode be separately controlled. A byte/half word mode flag is provided to control the "width" of narrow gauge operation. Add partial, substract partial and compare partial instructions operate on corresponding bytes or half words of two operands and return independent byte or half word results. Multiply partial instructions multiply byte or half word multiplicands by a common multiplier and return independent byte or half word products. The multi-gauge arithmetic operations of the present invention have particular application to graphics processing where repetitive operations are performed on large arrays of pixel data.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
APPLE INC.CUPERTINO, CA7719

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baum, Allen J Pittsburgh, PA 24 357

Cited Art

Patent Info (Count) # Cites Year
 
ALCATEL N.V. (1)
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CVSI, INC. (1)
4,761,755 Data processing system and method having an improved arithmetic unit 91 1984
 
KABUSHIKI KAISHA TOSHIBA (1)
4,825,401 Functional dividable multiplier array circuit for multiplication of full words or simultaneous multiplication of two half words 37 1987
 
LOCKHEED MARTIN CORPORATION (1)
4,901,268 Multiple function data processor 82 1988
 
Seiko Instruments & Electronics Ltd. (1)
4,719,588 Matrix multiplication circuit for graphic display 13 1984

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
INTEL CORPORATION (14)
5,907,842 Method of sorting numbers to obtain maxima/minima values with ordering 29 1995
5,675,526 Processor performing packed data multiplication 49 1996
6,243,803 Method and apparatus for computing a packed absolute differences with plurality of sign bits using SIMD add circuitry 22 1998
6,128,614 Method of sorting numbers to obtain maxima/minima values with ordering 12 1999
6,970,994 Executing partial-width packed data instructions 4 2001
7,424,505 Method and apparatus for performing multiply-add operations on packed data 0 2001
7,430,578 Method and apparatus for performing multiply-add operations on packed byte data 17 2003
7,395,298 Method and apparatus for performing multiply-add operations on packed data 18 2003
6,925,553 Staggering execution of a single packed data instruction using the same circuit 2 2003
7,509,367 Method and apparatus for performing multiply-add operations on packed data 0 2004
7,366,881 Method and apparatus for staggering execution of an instruction 0 2005
7,467,286 Executing partial-width packed data instructions 0 2005
8,185,571 Processor for performing multiply-add operations on packed data 0 2009
8,396,915 Processor for performing multiply-add operations on packed data 0 2012
 
TEXAS INSTRUMENTS INCORPORATED (2)
5,742,538 Long instruction word controlling plural independent processor operations 12 1996
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CISCO TECHNOLOGY, INC. (1)
6,356,999 Data processor with trie traversal instruction set extension 1 2000
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
5,093,908 Method and apparatus for executing instructions in a single sequential instruction stream in a main processor and a coprocessor 32 1989
 
PANASONIC CORPORATION (1)
7,237,089 SIMD operation method and SIMD operation apparatus that implement SIMD operations without a large increase in the number of instructions 0 2002
 
RADIUS INC. (1)
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RICOH COMPANY, LTD. (1)
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RYO HOLDINGS, LLC (1)
5,734,879 Saturation instruction in a data processor 1 1995
 
SUN MICROSYSTEMS, INC. (1)
5,815,164 Image rescaling in a parallel processor 4 1995
 
TRANSPACIFIC DIGITAL SYSTEMS, LLC (1)
5,386,540 Method and apparatus for transferring data within a computer using a burst sequence which includes modified bytes and a minimum number of unmodified bytes 22 1993