Method and apparatus for performing timing correction transformations on a technology-independent logic model during logic synthesis
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United States of America Patent
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Mar 26, 1991
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N/A
app pub date -
Jun 28, 1988
filing date -
Jun 28, 1988
priority date (Note) -
Expired
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Abstract
A computer program is disclosed providing a sequence of automated logic synthesis routines having three phases. Phase I identifies an estimated critical path by assuming optimum allocation within a 'best-fit' preliminary assignment of the technology to a technology-independent model, and optimizes the estimated model for speed. Phase II provides a technology-legal model, and ends by calculating the actual timing provided by the technology-legal model. Phase III uses self-limiting routines, and routines that are unlikely to produce technology violations, to fine tune the production and performance characteristics of the legal model.
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