Importance

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Abstract

An insulated gate semiconductor device has a gate protection circuit wherein the breakdown voltage can be arbitrarily selected. In one embodiment, the gate protection circuit includes first polysilicon layer of a first resistance overlaying the gate insulation layer formed on the semiconductor substrate and laterally spaced from the gate layer, and second polysilicon layer of a second resistance higher than the first resistance contacting the first polysilicon layer to form at least one pair of diodes for protecting the gate insulation layer from electrostatic destruction caused by a sudden voltage surge applied to the gate layer. In a second embodiment, the gate protection circuit includes a pair of Schottky barrier diodes consisting of a gate layer and a separation layer overlaying the gate insulation layer together with a layer contacting the gate layer and separation layer.

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First Claim