TTL to ECL voltage level translator
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United States of America Patent
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-
Jun 18, 1991
Grant Date -
N/A
app pub date -
Jul 5, 1988
filing date -
Jul 7, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The present invention relates to a level translator which translates TTL level signals to ECL level. The translating speed is enhanced by making the input circuit of the level translator which receives the TTL data signal composed of an emitter coupled pair such that the circuit does not act in saturation mode. Also, by designing the circuit to make current flow from the pull-up transistor of the TTL transfer through the resistance of the present invention when the TTL data is high level, and to make current flow through the pull-down transistor of the driving TTL circuit into the TTL to ECL level translator when low level, the present invention makes the time delay from the driving TTL circuit to the ECL receiving circuit very small.
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