Product of pillar alignment and formation process
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United States of America Patent
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-
Jun 18, 1991
Grant Date -
N/A
app pub date -
Feb 26, 1988
filing date -
Feb 26, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A process for the formation of pillars (28) in connection with the fabrication of a semiconductor device (10) is disclosed. The process first aligns a lead pattern (30) with an existing structure (24) in the semiconductor device (10). Next, the process aligns a pillar pattern (32) with the lead pattern (30). These two patterns (30, 32) are then transferred downward into respective conductive layers (26, 28) of the semiconductor device (10). An insulating layer (34) is deposited over the conductive layers (26, 28) and etched-back to expose a portion of the pillar (28). A conductive layer (42) is applied over the exposed pillar (28).
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