Assembly of semiconductor chips
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Jun 18, 1991
Grant Date -
N/A
app pub date -
Aug 9, 1988
filing date -
Aug 9, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A three dimensional package having at least one semiconductor chip having input/output conductive pads along its periphery includes a dielectric carrier over at least a portion of the chip and a plurality of conductors mounted on the carrier between the chip and the dielectric carrier. The plurality of conductors are mounted within the periphery of the chip with one end connected to the conductive pads and with the other end of the plurality of conductors exiting from the same side of the chip. The plurality of conductors exiting from the same side are electrically coupled to an interconnect substrate.
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