Separation circuit for a DRAM
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United States of America Patent
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-
Aug 6, 1991
Grant Date -
N/A
app pub date -
Nov 20, 1990
filing date -
Nov 30, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A separation circuit for a DRAM where the separation circuit comprises a first separation circuit and a second separation circuit is disclosed. The first separation circuit and the second separation circuit includes a high resistive MOSFET Q7, MOSFET Q9 and a low resistive MOSFET Q8, MOSFET Q10, respectively. The circuit enables the rapid transfer of data during the reading and writing of data to and from a selected memory cell without signal loss which results in an increased sensing ability of a sense amplifier.
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