Lead frame and semiconductor device using the same

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United States of America Patent

PATENT NO 5041901
SERIAL NO

07518410

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Abstract

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A lead frame having a plurality of inner leads and outer leads, said outer leads being subjected to surface treatment for improving solder wettability at an end portion and to sruface treatment for suppressing solder wettability at least at a portion neighboring to the end portion, or said outer leads being bent 4 times or more, is effective for improving thermal fatigue life and reliability when applied to a semi-conductor device.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD6-6 MARUNOUCHI 1-CHOME CHIYODA-KU TOKYO 1008280 ?1008280

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hoshi, Akio Isesaki, JP 22 519
Kawai, Sueo Ibaraki, JP 40 889
Kitano, Makoto Tsuchiura, JP 117 2088
Nishimura, Asao Ushiku, JP 156 3473
Shimizu, Ichio Gunma, JP 45 948
Yaguchi, Akihiro Ibaraki, JP 74 1889

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